Reversible Logic Circuit


Ri-Gui Zhou, PhD
College of Information Engineering, East China Jiaotong University, China

Naihuan Jing
Center of Quantum Algebra, South China University of Technology, China and Department of Mathematics, North Carolina State University, USA

Series: Electrical Engineering Developments
BISAC: TEC007000

In the conventional combination of logic circuits, energy loss is an important consideration. Research on reversible logic circuits are of interest to power minimization having applications in low power CMOS design, DNA computing, bioinformatics, nanotechnology, information security and so on. In this book, a novel reversible quantum full adder, reversible BCD adder, subtraction and quantum No-Wait-Carry adder and a novel reversible quantum array multiplier is introduced.

At the same time, the model of this array multiplier based on CMOS technology and pass-transistor is also discussed. Reversible arithmetic logic unit and a novel 1-bit reversible comparator and another novel 4-bit reversible comparator are described as well. Finally, this book devotes itself to the theory and simulation of QCA, introduces a study of quantum states in semi-classical simulation and the genetic simulated annealing simulation method based on the polarized rule.
(Imprint: Nova)



Table of Contents


Chapter 1 – Introduction (pp. 1-6)

Chapter 2 – Basic Knowledge of Reversible Quantum Logic Circuit (pp. 7-24)

Chapter 3 – Reversible Adders (pp. 25-84)

Chapter 4 – Transistor Realization of Reversible “ZS” Series Gates and a Reversible Array Multiplier (pp. 85-108)

Chapter 5 – Optimization Approaches for Designing a Novel 4-Bit Reversible Comparator (pp. 109-124)

Chapter 6 – Reversible Arithmetic Logic Unit (pp. 125-142)

Chapter 7 – QCA Theory (pp. 143-148)

Chapter 8 – QCA General Logic Gate Design (pp. 149-164)

Chapter 9 – QCA Simulation (pp. 165-178)


Additional information